Interconnect synthesis in high speed digital VLSI routing.

Sayed, Moustafa A., and Maksoud, Ehab Y.Abdel. "Interconnect synthesis in high speed digital VLSI routing.." International Journal of Open Problems in Computer Science and Mathematics. IJOPCM 2.3 (2009): 383-415. <http://eudml.org/doc/227238>.

@article{Sayed2009,
author = {Sayed, Moustafa A., Maksoud, Ehab Y.Abdel},
journal = {International Journal of Open Problems in Computer Science and Mathematics. IJOPCM},
keywords = {detailed routing; global routing; high speed digital VLSI design; interconnect synthesis; interval labeling scheme; line search routers; sequential routing},
language = {eng},
number = {3},
pages = {383-415},
publisher = {Irbid National University, Irbid},
title = {Interconnect synthesis in high speed digital VLSI routing.},
url = {http://eudml.org/doc/227238},
volume = {2},
year = {2009},
}

TY - JOUR
AU - Sayed, Moustafa A.
AU - Maksoud, Ehab Y.Abdel
TI - Interconnect synthesis in high speed digital VLSI routing.
JO - International Journal of Open Problems in Computer Science and Mathematics. IJOPCM
PY - 2009
PB - Irbid National University, Irbid
VL - 2
IS - 3
SP - 383
EP - 415
LA - eng
KW - detailed routing; global routing; high speed digital VLSI design; interconnect synthesis; interval labeling scheme; line search routers; sequential routing
UR - http://eudml.org/doc/227238
ER -