A mixed-signal architecture for high complexity CMOS fuzzy controlers.

Rafael Navas-González; Fernando Vidal-Verdú; Angel Rodríguez-Vázquez

Mathware and Soft Computing (1999)

  • Volume: 6, Issue: 2-3, page 331-343
  • ISSN: 1134-5632

Abstract

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Analog circuits provide better area/power efficiency than their digital counterparts for low-medium precision requirements [1]. This limit in precision, as well as the lack of design tools when compared to the digital approach, imposes a limit of complexity, hence fuzzy analog controllers are usually oriented to fast low-power systems with low-medium complexity. This paper presents a strategy to preserve most of the advantages of an analog implementation, while allowing a notorious increment of the system complexity. Such strategy consists in implementing a reduced number of rules, those that really determine the output in a lattice controller, which we call analog core, then this core is dynamically programmed to perform the computation related to a specific rule set. The data to program the analog core are stored in a memory, and constitutes the whole knowledge base in a kind of virtual rule set. An example 64-rule, 2-input, 4-bit singleton controller has been designed in a CMOS 0.7μmm technology to demonstrate the viability of the architecture. The measured input-output delay is around 500ns for a power consumption of 16mW and a chip area (without pads) of 2.65mm2.

How to cite

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Navas-González, Rafael, Vidal-Verdú, Fernando, and Rodríguez-Vázquez, Angel. "A mixed-signal architecture for high complexity CMOS fuzzy controlers.." Mathware and Soft Computing 6.2-3 (1999): 331-343. <http://eudml.org/doc/39163>.

@article{Navas1999,
abstract = {Analog circuits provide better area/power efficiency than their digital counterparts for low-medium precision requirements [1]. This limit in precision, as well as the lack of design tools when compared to the digital approach, imposes a limit of complexity, hence fuzzy analog controllers are usually oriented to fast low-power systems with low-medium complexity. This paper presents a strategy to preserve most of the advantages of an analog implementation, while allowing a notorious increment of the system complexity. Such strategy consists in implementing a reduced number of rules, those that really determine the output in a lattice controller, which we call analog core, then this core is dynamically programmed to perform the computation related to a specific rule set. The data to program the analog core are stored in a memory, and constitutes the whole knowledge base in a kind of virtual rule set. An example 64-rule, 2-input, 4-bit singleton controller has been designed in a CMOS 0.7μmm technology to demonstrate the viability of the architecture. The measured input-output delay is around 500ns for a power consumption of 16mW and a chip area (without pads) of 2.65mm2.},
author = {Navas-González, Rafael, Vidal-Verdú, Fernando, Rodríguez-Vázquez, Angel},
journal = {Mathware and Soft Computing},
keywords = {Control difuso; Lógica difusa; Inteligencia artificial; Circuitos analógicos; Microcircuitos lógicos},
language = {eng},
number = {2-3},
pages = {331-343},
title = {A mixed-signal architecture for high complexity CMOS fuzzy controlers.},
url = {http://eudml.org/doc/39163},
volume = {6},
year = {1999},
}

TY - JOUR
AU - Navas-González, Rafael
AU - Vidal-Verdú, Fernando
AU - Rodríguez-Vázquez, Angel
TI - A mixed-signal architecture for high complexity CMOS fuzzy controlers.
JO - Mathware and Soft Computing
PY - 1999
VL - 6
IS - 2-3
SP - 331
EP - 343
AB - Analog circuits provide better area/power efficiency than their digital counterparts for low-medium precision requirements [1]. This limit in precision, as well as the lack of design tools when compared to the digital approach, imposes a limit of complexity, hence fuzzy analog controllers are usually oriented to fast low-power systems with low-medium complexity. This paper presents a strategy to preserve most of the advantages of an analog implementation, while allowing a notorious increment of the system complexity. Such strategy consists in implementing a reduced number of rules, those that really determine the output in a lattice controller, which we call analog core, then this core is dynamically programmed to perform the computation related to a specific rule set. The data to program the analog core are stored in a memory, and constitutes the whole knowledge base in a kind of virtual rule set. An example 64-rule, 2-input, 4-bit singleton controller has been designed in a CMOS 0.7μmm technology to demonstrate the viability of the architecture. The measured input-output delay is around 500ns for a power consumption of 16mW and a chip area (without pads) of 2.65mm2.
LA - eng
KW - Control difuso; Lógica difusa; Inteligencia artificial; Circuitos analógicos; Microcircuitos lógicos
UR - http://eudml.org/doc/39163
ER -

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