Displaying similar documents to “Reduction in the number of PAL macrocells in the circuit of a Moore FSM”

Reduction in the number of LUT elements for control units with code sharing

Alexander Barkalov, Larysa Titarenko, Jacek Bieganowski (2010)

International Journal of Applied Mathematics and Computer Science

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Two methods are proposed targeted at reduction in the number of look-up table elements in logic circuits of compositional microprogram control units (CMCUs) with code sharing. The methods assume the application of field-programmable gate arrays for the implementation of the combinational part of the CMCU, whereas embedded-memory blocks are used for implementation of its control memory. Both methods are based on the existence of classes of pseudoequivalent operational linear chains in...

Design of mealy finite-state machines with the transformation of object codes

Alexander Barkalov, Alexander Barkalov (2005)

International Journal of Applied Mathematics and Computer Science

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An optimization method of the logic circuit of a Mealy finite-state machine is proposed. It is based on the transformation of object codes. The objects of the Mealy FSM are internal states and sets of microoperations. The main idea is to express the states as some functions of sets of microoperations (internal states) and tags. The application of this method is connected with the use of a special code converter in the logic circuit of an FSM. An example of application is given. The effectiveness...

FSM encoding for BDD representations

Wilsin Gosti, Tiziano Villa, Alex Saldanha, Alberto Sangiovanni-Vincentelli (2007)

International Journal of Applied Mathematics and Computer Science

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We address the problem of encoding the state variables of a finite state machine such that the BDD representing the next state function and the output function has the minimum number of nodes. We present an exact algorithm to solve this problem when only the present state variables are encoded. We provide results on MCNC benchmark circuits.

Design of microprogrammed controllers to be implemented in FPGAs

Remigiusz Wiśniewski, Alexander Barkalov, Larisa Titarenko, Wolfgang A. Halang (2011)

International Journal of Applied Mathematics and Computer Science

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In the article we propose a new design method for microprogrammed controllers. The traditional structure is improved by modifying internal modules and connections. Such a solution allows reducing the total number of logic elements needed for implementation in programmable structures, especially Field Programmable Gate Arrays (FPGAs). Detailed results of experiments show that on the average the application of the proposed methods yields up to 30% savings as far as the destination device...

Decomposition-based logic synthesis for PAL-based CPLDs

Adam Opara, Dariusz Kania (2010)

International Journal of Applied Mathematics and Computer Science

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The paper presents one concept of decomposition methods dedicated to PAL-based CPLDs. The proposed approach is an alternative to the classical one, which is based on two-level minimization of separate single-output functions. The key idea of the algorithm is to search for free blocks that could be implemented in PAL-based logic blocks containing a limited number of product terms. In order to better exploit the number of product terms, two-stage decomposition and BDD-based decomposition...