Remarks on hardware implementation of image processing algorithms
International Journal of Applied Mathematics and Computer Science (2008)
- Volume: 18, Issue: 1, page 105-110
- ISSN: 1641-876X
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topMarek Wnuk. "Remarks on hardware implementation of image processing algorithms." International Journal of Applied Mathematics and Computer Science 18.1 (2008): 105-110. <http://eudml.org/doc/207860>.
@article{MarekWnuk2008,
abstract = {Image processing in industrial vision systems requires both real-time speed and robustness. Modern computers, which fulfill the first demand, are sensitive to hard industrial environment conditions and require considerable amounts of energy. Programmable logic chips are available, which can realize many simple, still time-consuming operations in a parallel or a pipelined manner. The paper discusses particular features of the pipelined architecture and presents selected techniques of implementing early image processing procedures in hardware.},
author = {Marek Wnuk},
journal = {International Journal of Applied Mathematics and Computer Science},
keywords = {on-line image processing; real-time; hardware; pipeline; programmable logic},
language = {eng},
number = {1},
pages = {105-110},
title = {Remarks on hardware implementation of image processing algorithms},
url = {http://eudml.org/doc/207860},
volume = {18},
year = {2008},
}
TY - JOUR
AU - Marek Wnuk
TI - Remarks on hardware implementation of image processing algorithms
JO - International Journal of Applied Mathematics and Computer Science
PY - 2008
VL - 18
IS - 1
SP - 105
EP - 110
AB - Image processing in industrial vision systems requires both real-time speed and robustness. Modern computers, which fulfill the first demand, are sensitive to hard industrial environment conditions and require considerable amounts of energy. Programmable logic chips are available, which can realize many simple, still time-consuming operations in a parallel or a pipelined manner. The paper discusses particular features of the pipelined architecture and presents selected techniques of implementing early image processing procedures in hardware.
LA - eng
KW - on-line image processing; real-time; hardware; pipeline; programmable logic
UR - http://eudml.org/doc/207860
ER -
References
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- SGS-THOMSON Microelectronics (1994). IMSA110 Image and Signal Processing Sub-system, http://www.datasheetcatalog.com.
- Texas Instruments Europe (1997). Implementation of an Image Processing Library for the TMS320C8x, BPRA059, http://www.datasheetcatalog.com.
- Xilinx, Inc. (2007). Spartan-3A DSP FPGA Family: Complete Data Sheet, DS610, http://www.datasheetcatalog.com.
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