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Area-oriented technology mapping for LUT-based logic blocks

Marcin KubicaDariusz Kania — 2017

International Journal of Applied Mathematics and Computer Science

One of the main aspects of logic synthesis dedicated to FPGA is the problem of technology mapping, which is directly associated with the logic decomposition technique. This paper focuses on using configurable properties of CLBs in the process of logic decomposition and technology mapping. A novel theory and a set of efficient techniques for logic decomposition based on a BDD are proposed. The paper shows that logic optimization can be efficiently carried out by using multiple decomposition. The...

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