# Synthesis of finite state machines for CPLDs

Robert Czerwiński; Dariusz Kania

International Journal of Applied Mathematics and Computer Science (2009)

- Volume: 19, Issue: 4, page 647-659
- ISSN: 1641-876X

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topRobert Czerwiński, and Dariusz Kania. "Synthesis of finite state machines for CPLDs." International Journal of Applied Mathematics and Computer Science 19.4 (2009): 647-659. <http://eudml.org/doc/207963>.

@article{RobertCzerwiński2009,

abstract = {The paper presents a new two-step approach to FSM synthesis for PAL-based CPLDs that strives to find an optimum fit of an FSM to the structure of the CPLD. The first step, the original state assignment method, includes techniques of twolevel minimization and aims at area minimization. The second step, PAL-oriented multi-level optimization, is a search for implicants that can be shared by several functions. It is based on the graph of outputs. Results of experiments prove that the presented approach is especially effective for PAL-based CPLD structures containing a low number of product terms.},

author = {Robert Czerwiński, Dariusz Kania},

journal = {International Journal of Applied Mathematics and Computer Science},

keywords = {logic synthesis; FSM; state assignment; logic optimization; CPLD},

language = {eng},

number = {4},

pages = {647-659},

title = {Synthesis of finite state machines for CPLDs},

url = {http://eudml.org/doc/207963},

volume = {19},

year = {2009},

}

TY - JOUR

AU - Robert Czerwiński

AU - Dariusz Kania

TI - Synthesis of finite state machines for CPLDs

JO - International Journal of Applied Mathematics and Computer Science

PY - 2009

VL - 19

IS - 4

SP - 647

EP - 659

AB - The paper presents a new two-step approach to FSM synthesis for PAL-based CPLDs that strives to find an optimum fit of an FSM to the structure of the CPLD. The first step, the original state assignment method, includes techniques of twolevel minimization and aims at area minimization. The second step, PAL-oriented multi-level optimization, is a search for implicants that can be shared by several functions. It is based on the graph of outputs. Results of experiments prove that the presented approach is especially effective for PAL-based CPLD structures containing a low number of product terms.

LA - eng

KW - logic synthesis; FSM; state assignment; logic optimization; CPLD

UR - http://eudml.org/doc/207963

ER -

## References

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