Displaying similar documents to “Decomposition-based logic synthesis for PAL-based CPLDs”

Default logic as a formalism for understanding commonsense reasoning.

Gianni Amati, Luigia Carlucci Aiello, Fiora Pirri (1996)

Mathware and Soft Computing

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Commonsense reasoning is the reasoning of agents interacting with the real world. Non monotonic reasoning is a well developed research area gathering the logical formalisms that treat commonsense reasoning. One of the best known of such formalisms is Default logic. In this paper we discuss Default logic at both the proof-theoretic and semantics levels and show that Default logic provides a clear and formal framework to understand the logical nature of commonsense reasoning.

An approach based on the use of the ant system to design combinational logic circuits.

Benito Mendoza García, Carlos A. Coello Coello (2002)

Mathware and Soft Computing

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In this paper we report the first attempt to design combinational logic circuits using the ant system. In order to design circuits, a measure of quality improvement in partially built circuits is introduced and a cost metric (based on the number of gates) is adopted in order to optimize the feasible circuits generated. The approach is compared to a genetic algorithm and to a human designer using several examples and the sensitivity of the algorithm to its parameters is studied using...

Experimental analysis of some computation rules in a simple parallel reasoning system for the ALC description logic

Adam Meissner (2011)

International Journal of Applied Mathematics and Computer Science

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A computation rule determines the order of selecting premises during an inference process. In this paper we empirically analyse three particular computation rules in a tableau-based, parallel reasoning system for the ALC description logic, which is built in the relational programming model in the Oz language. The system is constructed in the lean deduction style, namely, it has the form of a small program containing only basic mechanisms, which assure soundness and completeness of reasoning....

Reduction in the number of PAL macrocells in the circuit of a Moore FSM

Alexander Barkalov, Larysa Titarenko, Sławomir Chmielewski (2007)

International Journal of Applied Mathematics and Computer Science

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Optimization methods of logic circuits for Moore finite-state machines are proposed. These methods are based on the existence of pseudoequivalent states of a Moore finite-state machine, a wide fan-in of PAL macrocells and free resources of embedded memory blocks. The methods are oriented to hypothetical VLSI microcircuits based on the CPLD technology and containing PAL macrocells and embedded memory blocks. The conditions of effective application of each proposed method are shown. An...

Conceptual Information Compression and Efficient Pattern Search

Angelova, Galia, Mihov, Stoyan (2008)

Serdica Journal of Computing

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This paper introduces an encoding of knowledge representation statements as regular languages and proposes a two-phase approach to processing of explicitly declared conceptual information. The idea is presented for the simple conceptual graphs where conceptual pattern search is implemented by the so called projection operation. Projection calculations are organised into off-line preprocessing and run-time computations. This enables fast run-time treatment of NP-complete problems, given...

Area-oriented technology mapping for LUT-based logic blocks

Marcin Kubica, Dariusz Kania (2017)

International Journal of Applied Mathematics and Computer Science

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One of the main aspects of logic synthesis dedicated to FPGA is the problem of technology mapping, which is directly associated with the logic decomposition technique. This paper focuses on using configurable properties of CLBs in the process of logic decomposition and technology mapping. A novel theory and a set of efficient techniques for logic decomposition based on a BDD are proposed. The paper shows that logic optimization can be efficiently carried out by using multiple decomposition....